
sigaction:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400698 <_init>:
  400698:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  40069c:	910003fd 	mov	x29, sp
  4006a0:	9400004a 	bl	4007c8 <call_weak_fn>
  4006a4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4006a8:	d65f03c0 	ret

Disassembly of section .plt:

00000000004006b0 <.plt>:
  4006b0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4006b4:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf5cc>
  4006b8:	f947fe11 	ldr	x17, [x16, #4088]
  4006bc:	913fe210 	add	x16, x16, #0xff8
  4006c0:	d61f0220 	br	x17
  4006c4:	d503201f 	nop
  4006c8:	d503201f 	nop
  4006cc:	d503201f 	nop

00000000004006d0 <strlen@plt>:
  4006d0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4006d4:	f9400211 	ldr	x17, [x16]
  4006d8:	91000210 	add	x16, x16, #0x0
  4006dc:	d61f0220 	br	x17

00000000004006e0 <exit@plt>:
  4006e0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4006e4:	f9400611 	ldr	x17, [x16, #8]
  4006e8:	91002210 	add	x16, x16, #0x8
  4006ec:	d61f0220 	br	x17

00000000004006f0 <sigemptyset@plt>:
  4006f0:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  4006f4:	f9400a11 	ldr	x17, [x16, #16]
  4006f8:	91004210 	add	x16, x16, #0x10
  4006fc:	d61f0220 	br	x17

0000000000400700 <__libc_start_main@plt>:
  400700:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400704:	f9400e11 	ldr	x17, [x16, #24]
  400708:	91006210 	add	x16, x16, #0x18
  40070c:	d61f0220 	br	x17

0000000000400710 <strerror@plt>:
  400710:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400714:	f9401211 	ldr	x17, [x16, #32]
  400718:	91008210 	add	x16, x16, #0x20
  40071c:	d61f0220 	br	x17

0000000000400720 <sigaction@plt>:
  400720:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400724:	f9401611 	ldr	x17, [x16, #40]
  400728:	9100a210 	add	x16, x16, #0x28
  40072c:	d61f0220 	br	x17

0000000000400730 <__gmon_start__@plt>:
  400730:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400734:	f9401a11 	ldr	x17, [x16, #48]
  400738:	9100c210 	add	x16, x16, #0x30
  40073c:	d61f0220 	br	x17

0000000000400740 <write@plt>:
  400740:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400744:	f9401e11 	ldr	x17, [x16, #56]
  400748:	9100e210 	add	x16, x16, #0x38
  40074c:	d61f0220 	br	x17

0000000000400750 <abort@plt>:
  400750:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400754:	f9402211 	ldr	x17, [x16, #64]
  400758:	91010210 	add	x16, x16, #0x40
  40075c:	d61f0220 	br	x17

0000000000400760 <__errno_location@plt>:
  400760:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400764:	f9402611 	ldr	x17, [x16, #72]
  400768:	91012210 	add	x16, x16, #0x48
  40076c:	d61f0220 	br	x17

0000000000400770 <fprintf@plt>:
  400770:	b0000090 	adrp	x16, 411000 <strlen@GLIBC_2.17>
  400774:	f9402a11 	ldr	x17, [x16, #80]
  400778:	91014210 	add	x16, x16, #0x50
  40077c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400780 <_start>:
  400780:	d280001d 	mov	x29, #0x0                   	// #0
  400784:	d280001e 	mov	x30, #0x0                   	// #0
  400788:	aa0003e5 	mov	x5, x0
  40078c:	f94003e1 	ldr	x1, [sp]
  400790:	910023e2 	add	x2, sp, #0x8
  400794:	910003e6 	mov	x6, sp
  400798:	580000c0 	ldr	x0, 4007b0 <_start+0x30>
  40079c:	580000e3 	ldr	x3, 4007b8 <_start+0x38>
  4007a0:	58000104 	ldr	x4, 4007c0 <_start+0x40>
  4007a4:	97ffffd7 	bl	400700 <__libc_start_main@plt>
  4007a8:	97ffffea 	bl	400750 <abort@plt>
  4007ac:	00000000 	.inst	0x00000000 ; undefined
  4007b0:	004008c8 	.word	0x004008c8
  4007b4:	00000000 	.word	0x00000000
  4007b8:	00400950 	.word	0x00400950
  4007bc:	00000000 	.word	0x00000000
  4007c0:	004009d0 	.word	0x004009d0
  4007c4:	00000000 	.word	0x00000000

00000000004007c8 <call_weak_fn>:
  4007c8:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf5cc>
  4007cc:	f947f000 	ldr	x0, [x0, #4064]
  4007d0:	b4000040 	cbz	x0, 4007d8 <call_weak_fn+0x10>
  4007d4:	17ffffd7 	b	400730 <__gmon_start__@plt>
  4007d8:	d65f03c0 	ret
  4007dc:	00000000 	.inst	0x00000000 ; undefined

00000000004007e0 <deregister_tm_clones>:
  4007e0:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  4007e4:	9101c000 	add	x0, x0, #0x70
  4007e8:	b0000081 	adrp	x1, 411000 <strlen@GLIBC_2.17>
  4007ec:	9101c021 	add	x1, x1, #0x70
  4007f0:	eb00003f 	cmp	x1, x0
  4007f4:	540000a0 	b.eq	400808 <deregister_tm_clones+0x28>  // b.none
  4007f8:	90000001 	adrp	x1, 400000 <_init-0x698>
  4007fc:	f944f821 	ldr	x1, [x1, #2544]
  400800:	b4000041 	cbz	x1, 400808 <deregister_tm_clones+0x28>
  400804:	d61f0020 	br	x1
  400808:	d65f03c0 	ret
  40080c:	d503201f 	nop

0000000000400810 <register_tm_clones>:
  400810:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  400814:	9101c000 	add	x0, x0, #0x70
  400818:	b0000081 	adrp	x1, 411000 <strlen@GLIBC_2.17>
  40081c:	9101c021 	add	x1, x1, #0x70
  400820:	cb000021 	sub	x1, x1, x0
  400824:	9343fc21 	asr	x1, x1, #3
  400828:	8b41fc21 	add	x1, x1, x1, lsr #63
  40082c:	9341fc21 	asr	x1, x1, #1
  400830:	b40000a1 	cbz	x1, 400844 <register_tm_clones+0x34>
  400834:	90000002 	adrp	x2, 400000 <_init-0x698>
  400838:	f944fc42 	ldr	x2, [x2, #2552]
  40083c:	b4000042 	cbz	x2, 400844 <register_tm_clones+0x34>
  400840:	d61f0040 	br	x2
  400844:	d65f03c0 	ret

0000000000400848 <__do_global_dtors_aux>:
  400848:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40084c:	910003fd 	mov	x29, sp
  400850:	f9000bf3 	str	x19, [sp, #16]
  400854:	b0000093 	adrp	x19, 411000 <strlen@GLIBC_2.17>
  400858:	3941e260 	ldrb	w0, [x19, #120]
  40085c:	35000080 	cbnz	w0, 40086c <__do_global_dtors_aux+0x24>
  400860:	97ffffe0 	bl	4007e0 <deregister_tm_clones>
  400864:	52800020 	mov	w0, #0x1                   	// #1
  400868:	3901e260 	strb	w0, [x19, #120]
  40086c:	f9400bf3 	ldr	x19, [sp, #16]
  400870:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400874:	d65f03c0 	ret

0000000000400878 <frame_dummy>:
  400878:	17ffffe6 	b	400810 <register_tm_clones>

000000000040087c <ctrl_c_op>:
  40087c:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400880:	910003fd 	mov	x29, sp
  400884:	f9000bf3 	str	x19, [sp, #16]
  400888:	b9002fa0 	str	w0, [x29, #44]
  40088c:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  400890:	9101a000 	add	x0, x0, #0x68
  400894:	f9400013 	ldr	x19, [x0]
  400898:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  40089c:	9101a000 	add	x0, x0, #0x68
  4008a0:	f9400000 	ldr	x0, [x0]
  4008a4:	97ffff8b 	bl	4006d0 <strlen@plt>
  4008a8:	aa0003e2 	mov	x2, x0
  4008ac:	aa1303e1 	mov	x1, x19
  4008b0:	52800040 	mov	w0, #0x2                   	// #2
  4008b4:	97ffffa3 	bl	400740 <write@plt>
  4008b8:	d503201f 	nop
  4008bc:	f9400bf3 	ldr	x19, [sp, #16]
  4008c0:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4008c4:	d65f03c0 	ret

00000000004008c8 <main>:
  4008c8:	a9b47bfd 	stp	x29, x30, [sp, #-192]!
  4008cc:	910003fd 	mov	x29, sp
  4008d0:	f9000bf3 	str	x19, [sp, #16]
  4008d4:	90000000 	adrp	x0, 400000 <_init-0x698>
  4008d8:	9121f000 	add	x0, x0, #0x87c
  4008dc:	f90017a0 	str	x0, [x29, #40]
  4008e0:	9100a3a0 	add	x0, x29, #0x28
  4008e4:	91002000 	add	x0, x0, #0x8
  4008e8:	97ffff82 	bl	4006f0 <sigemptyset@plt>
  4008ec:	b900b3bf 	str	wzr, [x29, #176]
  4008f0:	9100a3a0 	add	x0, x29, #0x28
  4008f4:	d2800002 	mov	x2, #0x0                   	// #0
  4008f8:	aa0003e1 	mov	x1, x0
  4008fc:	52800040 	mov	w0, #0x2                   	// #2
  400900:	97ffff88 	bl	400720 <sigaction@plt>
  400904:	7100001f 	cmp	w0, #0x0
  400908:	5400020a 	b.ge	400948 <main+0x80>  // b.tcont
  40090c:	b0000080 	adrp	x0, 411000 <strlen@GLIBC_2.17>
  400910:	9101c000 	add	x0, x0, #0x70
  400914:	f9400013 	ldr	x19, [x0]
  400918:	97ffff92 	bl	400760 <__errno_location@plt>
  40091c:	b9400000 	ldr	w0, [x0]
  400920:	97ffff7c 	bl	400710 <strerror@plt>
  400924:	aa0003e1 	mov	x1, x0
  400928:	90000000 	adrp	x0, 400000 <_init-0x698>
  40092c:	91284000 	add	x0, x0, #0xa10
  400930:	aa0103e2 	mov	x2, x1
  400934:	aa0003e1 	mov	x1, x0
  400938:	aa1303e0 	mov	x0, x19
  40093c:	97ffff8d 	bl	400770 <fprintf@plt>
  400940:	52800020 	mov	w0, #0x1                   	// #1
  400944:	97ffff67 	bl	4006e0 <exit@plt>
  400948:	14000000 	b	400948 <main+0x80>
  40094c:	00000000 	.inst	0x00000000 ; undefined

0000000000400950 <__libc_csu_init>:
  400950:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400954:	910003fd 	mov	x29, sp
  400958:	a901d7f4 	stp	x20, x21, [sp, #24]
  40095c:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf5cc>
  400960:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf5cc>
  400964:	91374294 	add	x20, x20, #0xdd0
  400968:	913722b5 	add	x21, x21, #0xdc8
  40096c:	a902dff6 	stp	x22, x23, [sp, #40]
  400970:	cb150294 	sub	x20, x20, x21
  400974:	f9001ff8 	str	x24, [sp, #56]
  400978:	2a0003f6 	mov	w22, w0
  40097c:	aa0103f7 	mov	x23, x1
  400980:	9343fe94 	asr	x20, x20, #3
  400984:	aa0203f8 	mov	x24, x2
  400988:	97ffff44 	bl	400698 <_init>
  40098c:	b4000194 	cbz	x20, 4009bc <__libc_csu_init+0x6c>
  400990:	f9000bb3 	str	x19, [x29, #16]
  400994:	d2800013 	mov	x19, #0x0                   	// #0
  400998:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  40099c:	aa1803e2 	mov	x2, x24
  4009a0:	aa1703e1 	mov	x1, x23
  4009a4:	2a1603e0 	mov	w0, w22
  4009a8:	91000673 	add	x19, x19, #0x1
  4009ac:	d63f0060 	blr	x3
  4009b0:	eb13029f 	cmp	x20, x19
  4009b4:	54ffff21 	b.ne	400998 <__libc_csu_init+0x48>  // b.any
  4009b8:	f9400bb3 	ldr	x19, [x29, #16]
  4009bc:	a941d7f4 	ldp	x20, x21, [sp, #24]
  4009c0:	a942dff6 	ldp	x22, x23, [sp, #40]
  4009c4:	f9401ff8 	ldr	x24, [sp, #56]
  4009c8:	a8c47bfd 	ldp	x29, x30, [sp], #64
  4009cc:	d65f03c0 	ret

00000000004009d0 <__libc_csu_fini>:
  4009d0:	d65f03c0 	ret

Disassembly of section .fini:

00000000004009d4 <_fini>:
  4009d4:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4009d8:	910003fd 	mov	x29, sp
  4009dc:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4009e0:	d65f03c0 	ret
